| Auto correlation | Cross correlation |
| Cm | Ef | Hh | Jb | Mc | Nt | On | Tr | Wb | Ef-Cm |
Ef-Hh |
Ef-Jb |
Ef-Mc |
Ef-Nt |
Ef-On |
Ef-Tr |
Ef-Wb |
CH01, 4974.49 MHz, USB, Rcp , parallel | ![](N07C3_Cm_0.png) |
![](N07C3_Ef_1.png) |
![](N07C3_Hh_2.png) |
![](N07C3_Jb_3.png) |
![](N07C3_Mc_4.png) |
![](N07C3_Nt_5.png) |
![](N07C3_On_6.png) |
![](N07C3_Tr_7.png) |
![](N07C3_Wb_8.png) |
N07C3_Cm0-Ef0_18.png - 3.334 - offset: -147
| N07C3_Hh0-Ef0_19.png - 32.07 - offset: -10
| N07C3_Jb0-Ef0_20.png - 131.8 - offset: 2
| N07C3_Mc0-Ef0_21.png - 145.8 - offset: -12
| N07C3_Nt0-Ef0_22.png - 92.55 - offset: -9
| N07C3_On0-Ef0_23.png - 78.07 - offset: 10
| N07C3_Tr0-Ef0_24.png - 149.8 - offset: -3
| N07C3_Wb0-Ef0_25.png - 166.7 - offset: 8
|
|
cross | |
N07C3_Cm0-Ef0_26.png - 3.489 - offset: -54
| N07C3_Hh0-Ef0_27.png - 4.471 - offset: -10
| N07C3_Jb0-Ef0_28.png - 7.124 - offset: 2
| N07C3_Mc0-Ef0_29.png - 11.62 - offset: -11
| N07C3_Nt0-Ef0_30.png - 12.13 - offset: -9
| N07C3_On0-Ef0_31.png - 3.167 - offset: 121
| N07C3_Tr0-Ef0_32.png - 8.591 - offset: -3
| N07C3_Wb0-Ef0_33.png - 22.49 - offset: 8
|
|
CH02, 4974.49 MHz, USB, Lcp , parallel | ![](N07C3_Cm_9.png) |
![](N07C3_Ef_10.png) |
![](N07C3_Hh_11.png) |
![](N07C3_Jb_12.png) |
![](N07C3_Mc_13.png) |
![](N07C3_Nt_14.png) |
![](N07C3_On_15.png) |
![](N07C3_Tr_16.png) |
![](N07C3_Wb_17.png) |
N07C3_Cm0-Ef0_42.png - 3.613 - offset: 70
| N07C3_Hh0-Ef0_43.png - 34.43 - offset: -10
| N07C3_Jb0-Ef0_44.png - 116 - offset: 2
| N07C3_Mc0-Ef0_45.png - 149.9 - offset: -12
| N07C3_Nt0-Ef0_46.png - 77.8 - offset: -9
| N07C3_On0-Ef0_47.png - 75.24 - offset: 10
| N07C3_Tr0-Ef0_48.png - 135.2 - offset: -3
| N07C3_Wb0-Ef0_49.png - 269.3 - offset: 8
|
|
cross | |
N07C3_Cm0-Ef0_34.png - 3.144 - offset: 6
| N07C3_Hh0-Ef0_35.png - 4.867 - offset: -10
| N07C3_Jb0-Ef0_36.png - 10.55 - offset: 2
| N07C3_Mc0-Ef0_37.png - 6.06 - offset: -11
| N07C3_Nt0-Ef0_38.png - 3.412 - offset: -17
| N07C3_On0-Ef0_39.png - 9.577 - offset: 10
| N07C3_Tr0-Ef0_40.png - 12.79 - offset: -3
| N07C3_Wb0-Ef0_41.png - 18.96 - offset: 8
|
|
CH03, 4982.49 MHz, USB, Rcp , parallel | ![](N07C3_Cm_50.png) |
![](N07C3_Ef_51.png) |
![](N07C3_Hh_52.png) |
![](N07C3_Jb_53.png) |
![](N07C3_Mc_54.png) |
![](N07C3_Nt_55.png) |
![](N07C3_On_56.png) |
![](N07C3_Tr_57.png) |
![](N07C3_Wb_58.png) |
N07C3_Cm0-Ef0_68.png - 80.33 - offset: 2
| N07C3_Hh0-Ef0_69.png - 32.96 - offset: -10
| N07C3_Jb0-Ef0_70.png - 133.8 - offset: 2
| N07C3_Mc0-Ef0_71.png - 143.8 - offset: -11
| N07C3_Nt0-Ef0_72.png - 82.07 - offset: -9
| N07C3_On0-Ef0_73.png - 70.96 - offset: 10
| N07C3_Tr0-Ef0_74.png - 143.6 - offset: -3
| N07C3_Wb0-Ef0_75.png - 168.8 - offset: 8
|
|
cross | |
N07C3_Cm0-Ef0_76.png - 4.006 - offset: 2
| N07C3_Hh0-Ef0_77.png - 6.378 - offset: -10
| N07C3_Jb0-Ef0_78.png - 5.022 - offset: 2
| N07C3_Mc0-Ef0_79.png - 11.61 - offset: -12
| N07C3_Nt0-Ef0_80.png - 11.7 - offset: -8
| N07C3_On0-Ef0_81.png - 3.878 - offset: -8
| N07C3_Tr0-Ef0_82.png - 7.007 - offset: -3
| N07C3_Wb0-Ef0_83.png - 8.213 - offset: 8
|
|
CH04, 4982.49 MHz, USB, Lcp , parallel | ![](N07C3_Cm_59.png) |
![](N07C3_Ef_60.png) |
![](N07C3_Hh_61.png) |
![](N07C3_Jb_62.png) |
![](N07C3_Mc_63.png) |
![](N07C3_Nt_64.png) |
![](N07C3_On_65.png) |
![](N07C3_Tr_66.png) |
![](N07C3_Wb_67.png) |
N07C3_Cm0-Ef0_92.png - 106.5 - offset: 2
| N07C3_Hh0-Ef0_93.png - 34.37 - offset: -10
| N07C3_Jb0-Ef0_94.png - 100 - offset: 2
| N07C3_Mc0-Ef0_95.png - 149.7 - offset: -12
| N07C3_Nt0-Ef0_96.png - 74.23 - offset: -9
| N07C3_On0-Ef0_97.png - 74.68 - offset: 10
| N07C3_Tr0-Ef0_98.png - 145.9 - offset: -3
| N07C3_Wb0-Ef0_99.png - 161.5 - offset: 8
|
|
cross | |
N07C3_Cm0-Ef0_84.png - 19.8 - offset: 2
| N07C3_Hh0-Ef0_85.png - 4.215 - offset: -10
| N07C3_Jb0-Ef0_86.png - 10.71 - offset: 2
| N07C3_Mc0-Ef0_87.png - 6.665 - offset: -11
| N07C3_Nt0-Ef0_88.png - 3.818 - offset: -8
| N07C3_On0-Ef0_89.png - 7.949 - offset: 10
| N07C3_Tr0-Ef0_90.png - 10.94 - offset: -3
| N07C3_Wb0-Ef0_91.png - 12.5 - offset: 8
|
|
CH05, 4990.49 MHz, USB, Rcp , parallel | ![](N07C3_Cm_100.png) |
![](N07C3_Ef_101.png) |
![](N07C3_Hh_102.png) |
![](N07C3_Jb_103.png) |
![](N07C3_Mc_104.png) |
![](N07C3_Nt_105.png) |
![](N07C3_On_106.png) |
![](N07C3_Tr_107.png) |
![](N07C3_Wb_108.png) |
N07C3_Cm0-Ef0_118.png - 2.884 - offset: 7
| N07C3_Hh0-Ef0_119.png - 32.61 - offset: -10
| N07C3_Jb0-Ef0_120.png - 129.3 - offset: 2
| N07C3_Mc0-Ef0_121.png - 156.2 - offset: -11
| N07C3_Nt0-Ef0_122.png - 86.22 - offset: -9
| N07C3_On0-Ef0_123.png - 77.77 - offset: 10
| N07C3_Tr0-Ef0_124.png - 139 - offset: -3
| N07C3_Wb0-Ef0_125.png - 215.4 - offset: 8
|
|
cross | |
N07C3_Cm0-Ef0_126.png - 5.137 - offset: 2
| N07C3_Hh0-Ef0_127.png - 3.372 - offset: -75
| N07C3_Jb0-Ef0_128.png - 4.107 - offset: 2
| N07C3_Mc0-Ef0_129.png - 13.67 - offset: -11
| N07C3_Nt0-Ef0_130.png - 11.79 - offset: -9
| N07C3_On0-Ef0_131.png - 3.73 - offset: 4
| N07C3_Tr0-Ef0_132.png - 9.963 - offset: -3
| N07C3_Wb0-Ef0_133.png - 13.12 - offset: 8
|
|
CH06, 4990.49 MHz, USB, Lcp , parallel | ![](N07C3_Cm_109.png) |
![](N07C3_Ef_110.png) |
![](N07C3_Hh_111.png) |
![](N07C3_Jb_112.png) |
![](N07C3_Mc_113.png) |
![](N07C3_Nt_114.png) |
![](N07C3_On_115.png) |
![](N07C3_Tr_116.png) |
![](N07C3_Wb_117.png) |
N07C3_Cm0-Ef0_142.png - 114.3 - offset: 2
| N07C3_Hh0-Ef0_143.png - 34.7 - offset: -10
| N07C3_Jb0-Ef0_144.png - 115.7 - offset: 2
| N07C3_Mc0-Ef0_145.png - 147.6 - offset: -11
| N07C3_Nt0-Ef0_146.png - 86.86 - offset: -9
| N07C3_On0-Ef0_147.png - 75.36 - offset: 10
| N07C3_Tr0-Ef0_148.png - 142.5 - offset: -3
| N07C3_Wb0-Ef0_149.png - 208.2 - offset: 8
|
|
cross | |
N07C3_Cm0-Ef0_134.png - 4.222 - offset: -15
| N07C3_Hh0-Ef0_135.png - 6.991 - offset: -10
| N07C3_Jb0-Ef0_136.png - 9.397 - offset: 2
| N07C3_Mc0-Ef0_137.png - 4.28 - offset: -11
| N07C3_Nt0-Ef0_138.png - 3.845 - offset: 128
| N07C3_On0-Ef0_139.png - 7.711 - offset: 10
| N07C3_Tr0-Ef0_140.png - 11.77 - offset: -3
| N07C3_Wb0-Ef0_141.png - 17.4 - offset: 8
|
|
CH07, 4998.49 MHz, USB, Rcp , parallel | ![](N07C3_Cm_150.png) |
![](N07C3_Ef_151.png) |
![](N07C3_Hh_152.png) |
![](N07C3_Jb_153.png) |
![](N07C3_Mc_154.png) |
![](N07C3_Nt_155.png) |
![](N07C3_On_156.png) |
![](N07C3_Tr_157.png) |
![](N07C3_Wb_158.png) |
N07C3_Cm0-Ef0_168.png - 3.3 - offset: 41
| N07C3_Hh0-Ef0_169.png - 28.97 - offset: -10
| N07C3_Jb0-Ef0_170.png - 130.3 - offset: 2
| N07C3_Mc0-Ef0_171.png - 150.6 - offset: -11
| N07C3_Nt0-Ef0_172.png - 82.46 - offset: -9
| N07C3_On0-Ef0_173.png - 73.46 - offset: 10
| N07C3_Tr0-Ef0_174.png - 129.5 - offset: -3
| N07C3_Wb0-Ef0_175.png - 202.1 - offset: 8
|
|
cross | |
N07C3_Cm0-Ef0_176.png - 3.655 - offset: -38
| N07C3_Hh0-Ef0_177.png - 5.111 - offset: -10
| N07C3_Jb0-Ef0_178.png - 3.711 - offset: 115
| N07C3_Mc0-Ef0_179.png - 11.94 - offset: -11
| N07C3_Nt0-Ef0_180.png - 5.879 - offset: -9
| N07C3_On0-Ef0_181.png - 3.676 - offset: -81
| N07C3_Tr0-Ef0_182.png - 7.495 - offset: -3
| N07C3_Wb0-Ef0_183.png - 10.34 - offset: 8
|
|
CH08, 4998.49 MHz, USB, Lcp , parallel | ![](N07C3_Cm_159.png) |
![](N07C3_Ef_160.png) |
![](N07C3_Hh_161.png) |
![](N07C3_Jb_162.png) |
![](N07C3_Mc_163.png) |
![](N07C3_Nt_164.png) |
![](N07C3_On_165.png) |
![](N07C3_Tr_166.png) |
![](N07C3_Wb_167.png) |
N07C3_Cm0-Ef0_192.png - 3.127 - offset: -5
| N07C3_Hh0-Ef0_193.png - 32.59 - offset: -10
| N07C3_Jb0-Ef0_194.png - 118.5 - offset: 2
| N07C3_Mc0-Ef0_195.png - 135.2 - offset: -11
| N07C3_Nt0-Ef0_196.png - 42.02 - offset: -9
| N07C3_On0-Ef0_197.png - 76.45 - offset: 10
| N07C3_Tr0-Ef0_198.png - 129.6 - offset: -3
| N07C3_Wb0-Ef0_199.png - 212.8 - offset: 8
|
|
cross | |
N07C3_Cm0-Ef0_184.png - 3.113 - offset: -34
| N07C3_Hh0-Ef0_185.png - 5.521 - offset: -10
| N07C3_Jb0-Ef0_186.png - 8.566 - offset: 2
| N07C3_Mc0-Ef0_187.png - 3.584 - offset: -88
| N07C3_Nt0-Ef0_188.png - 5.776 - offset: -9
| N07C3_On0-Ef0_189.png - 9.363 - offset: 10
| N07C3_Tr0-Ef0_190.png - 10.48 - offset: -3
| N07C3_Wb0-Ef0_191.png - 14.35 - offset: 8
|
|